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ADV7802
The CP contains circuitry to enable the detection of Macrovision
encoded YPrPb signals for 525i, 625i, 525p, and 625p. It is
designed to be fully robust to these types of signals.
CP features include
? 525i, 625i, 525p, 625p, 720p, 1080i, 1080p, and many other
HDTV formats supported
? Automatic adjustments including gain (contrast) and
offset (brightness); manual adjustment controls are also
supported
ADDITIONAL FEATURES
The ADV7802 also includes
? HS, VS, FIELD, and DE output signals with programmable
position, polarity, and width
? Programmable interrupt request output pin (INT) that
signals SDP/CP status changes
? Two I 2 C host port interface (control and VBI) support
? Integrated programmable antialiasing filters
Data Sheet
?
Support for analog component YPrPb and RGB video
?
176-lead, 26 mm × 26 mm, RoHS-compliant LQFP
formats with embedded synchronization or with separate
HS, VS, or CS
For more detailed product information about the ADV7802,
contact a local Analog Devices sales representative.
?
?
?
Any-to-any, 3 × 3 color space conversion matrix that
supports YCrCb-to-RGB and RGB-to-YCrCb, fully
programmable or preprogrammable configurations
Synchronization source polarity detector (SSPD) that
determines the source and polarity of the synchronization
signals that accompany the input video
Macrovision copy protection detection on component
formats (525i, 625i, 525p, and 625p)
SINGLE DATA RATE (SDR)
The ADV7802 uses SDR external memory 1 for 3D comb, frame
synchronizer operation, or 3D-DNR nonconcurrent operation.
? 64 Mb SDR SDRAM minimum memory requirement.
? The memory architecture required is four banks of
1 Mb × 16.
? Speed grade of 133 MHz at CAS latency (CL) 3 is required.
?
?
Free run output mode that provides stable timing when no
video input is present
Arbitrary pixel sampling support for nonstandard
video sources
?
?
22 ? series termination resistors are recommended for this
configuration.
Recommended memory that is compatible with the
ADV7802 includes the MT48LC4M16A2 from Micron.
?
?
135 MHz graphics processing, supporting RGB input
resolutions up to 1280 × 1024 at 75 Hz
Automatic or manual clamp-and-gain controls for
DOUBLE DATA RATE (DDR)
The ADV7802 uses DDR external memory 1 for simultaneous
3D comb, frame synchronizer, and 3D-DNR operation.
graphics modes
?
128 Mb DDR SDRAM minimum memory requirement.
?
?
?
Contrast, brightness, hue, and saturation controls
32-phase DLL that allows optimum pixel clock sampling
Automatic detection of synchronization source and
polarity by SSPD block
?
?
?
The memory architecture required is four banks of
2 Mb × 16.
Speed grade of 133 MHz at CAS latency (CL) 2.5 is required.
Termination resistors not recommended for this
When external memory is not connected, IO Map Register 0x29[4] should be
?
?
?
?
Standard identification enabled by STDI block
RGB that can be color space converted to YCrCb and
decimated to a 4:2:2 format for videocentric back-end IC
interfacing
Data enable (DE) output signal supplied for direct
connection to HDMI/DVI Tx IC
Arbitrary pixel sampling support for nonstandard video
configuration.
? Recommended memory that is compatible with the
ADV7802 includes K4H281638B-TCB0 from Samsung,
the MT46V8M16-TGP-75 from Micron, and the
HYB25D128160CE-6 from Infineon.
1
set high directly after reset.
sources
Rev. D | Page 16 of 36
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